This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2001-284869, filed on Sep. 19, 2001; the entire contents of which are incorporated herein by reference.
1. Field of the Invention
This invention relates to a semiconductor device and a method of manufacturing the same.
2. Related Background Art
In recent years, the demand for high performance micro-silicon devices has been remarkably increasing. Such devices typically include electrically writable/erasable nonvolatile semiconductor memories (EEPROMS), logical devices and thin film transistors. Of these devices, nonvolatile semiconductor memories and logical devices require reducing the film thickness of the gate insulating film in order to be downsized without sacrificing their performances. However, conventional silicon oxide film and silicon nitride film intrinsically accompany the problem of increased leak current as trade off for the reduction of film thickness. It is difficult for such films to be further downsized and, at the same time, show improved performances.
In view of this problem, there have been developed techniques for using high dielectric film typically made of titanium oxide, zirconium oxide or hafnium oxide that shows a dielectric constant higher than silicon oxide film or silicon nitride film as gate insulating film for the purpose of reducing the leak current and achieving a high insulation effect by increasing the actual film thickness, while maintaining the film thickness reduced to oxide film. However, there is still a strong demand for a higher insulation effect.
Furthermore, there have been developed techniques for regulating the work function and reducing the resistance of such devices by using polycrystalline silicon for the gate electrode and doping it with p type and n type impurities. However, there is still a strong demand for reducing the resistance of the gate electrode and other components of the device.
Meanwhile, in the case of thin film transistors that are typically used for liquid crystal devices, there is a demand for devices having a channel silicon layer that shows increased carrier mobility and is capable of operating with an enhanced level of reliability in order to provide improved functions and performances and high speed operations. Efforts are being paid to poly-crystallize the channel silicon layer and control the crystal grain size thereof by optimizing the channel silicon layer forming conditions including the film forming conditions and the annealing conditions in order to meet the demand. However, there is still a strong demand for devices whose channel silicon layer shows improved carrier mobility and operates with an enhanced level of reliability.
Also efforts are being paid to develop transistors using a single crystal silicon channel formed on an insulating film referred to as SOI (silicon on insulator) substrate in order to realize high speed operations of semiconductor devices.
In the case of an SOI substrate, by a known method, oxygen ions are injected into the silicon substrate by applying a high acceleration voltage from the surface thereof and then the substrate is annealed at high temperature so as to produce an SiO2 layer in the middle of the substrate. However, defects can be produced on the surface silicon film with this method. There is also a known method by which a silicon substrate provided with a silicon oxide film and an ordinary silicon substrate are bonded together with the silicon oxide film sandwiched by the two substrates and the surface of one of the substrates is polished to produce an SOI substrate. However, this method involves a large number of manufacturing steps to raise the cost of the produced substrate.
As pointed out above, there is still a strong demand for gate insulating films showing an improved insulating effect, gate electrodes with reduced resistance and channel silicon layers showing improved carrier mobility and an enhanced level of reliability.
In view of the above identified circumstances, it is therefore an object of the present invention to provide a semiconductor device and a method of manufacturing the same that can improve the insulating effect of the gate insulating film, reduce the resistance of the gate electrode and improve the carrier mobility and the reliability of the channel silicon layer.
Another object of the present invention is to provide a semiconductor device and a method of manufacturing the same by using a substrate that shows a SOI structure with a defect-free silicon layer and can be produced with a reduced number of manufacturing steps.
In an aspect of the invention, the above objects are achieved by providing a method of manufacturing a semiconductor device comprising:
contacting an amorphous semiconductor layer and a crystalline insulating layer oriented in a predetermined crystal face orientation, growing the amorphous semiconductor layer in a solid phase by using the insulating layer as core (nuclei) and producing a polycrystal or single crystal semiconductor layer with a unified crystal face orientation; and forming a functional element on the basis of the polycrystal or single crystal semiconductor layer.
Preferably, the insulating layer is formed by depositing oxide of a rare earth metal on the amorphous semiconductor layer by epitaxial growth at temperature between 300xc2x0 C. and 700xc2x0 C. under oxygen partial pressure between 1xc3x9710xe2x88x928 and 1xc3x9710xe2x88x925 Torr.
Preferably, the rare earth metal oxide is CeO2.
Preferably, the crystal face orientation of the insulating layer is (110) or (111).
It is practically useful when the solid phase growth of the amorphous semiconductor layer is conducted at temperature between 400xc2x0 C. and 1,000xc2x0 C.
Preferably, the amorphous semiconductor layer is made of Si and the insulating layer is made of CeO2.
In another aspect of the present invention, there is provided a method of manufacturing a semiconductor device comprising:
depositing a crystalline insulating layer showing a predetermined crystal face orientation on a first semiconductor layer by epitaxial growth;
depositing an amorphous semiconductor layer on the insulating layer;
forming a crystalline layer by growing the amorphous semiconductor layer in a solid phase, using the insulating layer as core; and
forming a functional element in the crystalline layer.
The first semiconductor layer may be a polycrystal or single crystal layer.
The first semiconductor layer may be an amorphous layer, which may be crystallized by solid phase growth, using the insulating layer as core.
In still another aspect of the invention, there is provided a method of manufacturing a semiconductor device comprising:
depositing an amorphous Si layer on an insulating substrate containing Si;
depositing a crystalline insulating layer oriented in a predetermined crystal face orientation by growing a CeO2 layer on the amorphous Si layer;
forming a polycrystal or single crystal semiconductor substrate by growing the amorphous Si layer in a solid phase, using the crystalline insulating of CeO2 as core; and
forming a functional element in the semiconductor substrate.
In still another aspect of the invention, there is provided a method of manufacturing a semiconductor device comprising:
forming a crystalline insulating layer oriented in a predetermined crystal face orientation on a first semiconductor layer by epitaxial growth;
depositing an amorphous second semiconductor layer on the insulating layer;
growing the amorphous second semiconductor layer in a solid phase, using the insulating layer as core;
removing the insulating layer and the second semiconductor layer except the regions for making a gate insulating film and a gate electrode; and
forming a MIS transistor by diffusing an impurity of the conductivity type opposite to the first semiconductor layer at the opposite sides of the regions, thereby forming source and drain regions.
In still another aspect of the invention, there is provided a method of manufacturing a semiconductor device comprising:
growing a crystalline insulating layer oriented in a predetermined crystal face orientation on an amorphous first semiconductor layer;
depositing an amorphous second semiconductor layer on the crystalline insulating layer;
growing at least the first semiconductor layer in a solid phase, using the crystalline insulating layer as core;
removing the crystalline insulating layer and the second semiconductor layer by etching except regions the regions for making a gate insulating film and a gate electrode; and
forming a MIS transistor by diffusing an impurity of the conductivity type opposite to the first semiconductor layer at the opposite sides of the regions, thereby forming source and drain regions.
In a further aspect of the invention, there is provided a semiconductor device including a MIS transistor, the device comprising:
a crystalline insulating layer formed by epitaxial growth with a crystal face orientation positioned between a first semiconductor layer and a second semiconductor layer;
at least either the first semiconductor layer or the second semiconductor layer being a polycrystal or single crystal semiconductor layer grown from an amorphous layer in a solid phase by using the insulating layer as core and showing a uniformly oriented crystal face orientation;
the first semiconductor layer being used as source/drain regions;
the second semiconductor layer being used as gate electrode.